at91: define matrix registers bit fields

Signed-off-by: Asen Dimov <[email protected]>

MX31: Removed erroneous board name from QONG

QONG is a module that can be installed on several boards,
not only on the QONG-EVB manufactured by Dave srl.

Signed-off-by: Stefano Babic <[email protected]>

MX31: Add UBI support to QONG module

The UBI/UBIFS support is added to the QONG module.

Signed-off-by: Stefano Babic <[email protected]>

MX31: Support 128MB RAM on QONG module

The QONG module can be downsized and delivered
with 128MB instead of 256MB. The patch adds
run time support for the two different memory
configurations.

Signed-off-by: Stefano Babic <[email protected]>

MX31: Add support for NAND to QONG board

The NAND device is connected to the FPGA of the QONG board
and not to the NFC controller. For this reason, the FPGA must
be set and initialized before accessing to the NAND itself.

Signed-off-by: Stefano Babic <[email protected]>

MX31: add pin definitions for NAND controller

Add pin definitions ralted to the NAND controller to be used
to set up the pin multiplexer.

Signed-off-by: Stefano Babic <[email protected]>

MX31: add accessor function to get a gpio

The patch adds an accessor function to get the value of a gpio.

Signed-off-by: Stefano Babic <[email protected]>

mx51evk: correct list of possible BOOT_FROM values

Signed-off-by: Stefano Babic <[email protected]>

mkimage: correct spelling error in imximage

Signed-off-by: Stefano Babic <[email protected]>

MX25 print arm clock instead of mpllclk on boot

Replace call to imx_get_mpllclk with imx_get_armclk
to show frequency of ARM core instead of mpll internal
bus in print_cpuinfo.

Signed-off-by: John Rigby <[email protected]>
CC: Stefano Babic <[email protected]>

configs/openrd_base.h: reordered macros

moved CONFIG_CMD_FAT to filesystem section
swapped CONFIG_CMD_NAND and CONFIG_CMD_MII so they are alpha correct

Signed-off-by: Frans Meulenbroeks <[email protected]>

configs/sheevaplug: added a few additional commands

This patch includes a few additional commands in the sheevaplug
version of u-boot:
- support for LONGHELP so you can get help messages
- auto completion and command editing
- ubi and mii support
- ext2 filesystem (convenient if you have an ext2 from which you want to boot)
- jffs2 and ubifs filesystems (if you want to use these in NAND)

This also makes it more similar to openrd client.

Side effect of this patch is that the code now needs 3 sectors i.s.o. 2
so an existing env is overwritten

Signed-off-by: Frans Meulenbroeks <[email protected]>

Marvell GuruPlug Board Support

GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0
GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot

References:
http://www.globalscaletechnologies.com/t-guruplugdetails.aspx
http://plugcomputer.org

This patch is for GuruPlug Plus, but it supports Standard version
as well.

Signed-off-by: Siddarth Gore <[email protected]>

Moved board specific values in config file

The lowlevel_init file contained some hard-coded values
to setup the RAM. These board related values are moved into
the board configuration file.

Signed-off-by: Stefano Babic <[email protected]>

MX51EVK: Remove CPLD related code

There is no CPLD on MX51EVK board, so remove CPLD related function.

Signed-off-by: Fabio Estevam <[email protected]>

arm, i.mx27: add support for magnesium board from projectiondesign

This patch adds support for the magnesium board from
projectiondesign. This board uses i.MX27 SoC and has
8MB NOR flash, 128MB NAND flash, FEC ethernet controller
integrated into i.MX27. As this port is based on
the imx27lite port, common config options are collected
in include/configs/imx27lite-common.h

Signed-off-by: Heiko Schocher <[email protected]>

arm, mx27: add support for SDHC1 pin init

Signed-off-by: Heiko Schocher <[email protected]>

SAMSUNG: make s5p common gpio functions

Because of s5pc1xx gpio is same as s5p seires SoC,
move gpio functions to drvier/gpio/
and modify structure's name from s5pc1xx_ to s5p_.

Signed-off-by: Minkyu Kang <[email protected]>

SAMSUNG: serial: modify name from s5pc1xx to s5p

Because of other s5p series SoC will use these serial functions,
modify function's name and structure's name.

Signed-off-by: Minkyu Kang <[email protected]>

pm9263: remove CONFIG_CMD_AUTOSCRIPT

Signed-off-by: Asen Dimov <[email protected]>

at91: add defines for RTT and GPBR

Signed-off-by: Alexander Holler <[email protected]>

pm9261: remove CONFIG_CMD_AUTOSCRIPT

Signed-off-by: Asen Dimov <[email protected]>

pm9261 converted to at91 soc access

Signed-off-by: Asen Dimov <[email protected]>

ARM Update mach-types

Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit 85b3cce880a19e78286570d5fd004cc3cac06f57

Signed-off-by: Tom Rix <[email protected]>

Merge branch 'master' of git://git.denx.de/u-boot-video

Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx

MX31: Added LCD support for QONG module

Added support for LCD and splash image to the QONG module.
The supported display is VBEST-VGG322403.

Signed-off-by: Stefano Babic <[email protected]>

Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

Merge branch 'next' of git://git.denx.de/u-boot-nios

ppc: Split MPC83xx SERDES code from MPC85xx/MPC86xx/QorIQ

The MPC83xx SERDES control is different from the other FSL PPC chips.
For now lets split it out so we can standardize on interfaces for
determining of a device on SERDES is configured.

Signed-off-by: Kumar Gala <[email protected]>
Acked-by: Kim Phillips <[email protected]>

mpc85xx: Add the ability to set LCRR[CLKDIV] to improve R/W speed of flash

Signed-off-by: Lan Chunhe <[email protected]>
Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>

85xx: clean up the io_sel for PCI express of P1022

clean up the wrong io_sel for PCI express according to latest manual.

Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>

85xx/socrates: Remove NFS support to fit image size.

This fixes an overflow during the link phase.

Signed-off-by: Detlev Zundel <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>

85xx: Fix compile warning

cpu.c: In function 'checkcpu':
cpu.c:47: warning: unused variable 'gur'

Signed-off-by: Kumar Gala <[email protected]>

85xx: Convert cpu_init_f code to use out_be32 for LBC registers

Signed-off-by: Kumar Gala <[email protected]>

fsl_sata: Move the snoop bit to another place

For P1022 SATA host controller, the data snoop bit of DW3 in PRDT
is moved to bit28.

Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>

fsl_sata: Add the workaround for errata SATA-A001

After power on, the SATA host controller of P1022 Rev1 is configured
in legacy mode instead of the expected enterprise mode.

Software needs to clear bit[28] of HControl register to change to
enterprise mode after bringing the host offline.

Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>

fsl-ddr: Add extra cycle to turnaround times

Add an extra cycle turnaround time to read->write to ensure stability
at high DDR frequencies.

Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>

fsl-ddr: add the macro for Rtt_Nom definition

add the macro definition for Rtt_Nom termination value for DDR3

Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>

ppc/p4080: Add p4080 DEVDISR2 & SRDS_PLLCR0 defines

Added some needed fines and some misc additional defines
used by p4080 initialization.

Signed-off-by: Kumar Gala <[email protected]>

ppc/p4080: Extend the GUTS memory map

Extend pin control and clock control to GUTS memory map

Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>

ppc/p4080: Fix synchronous frequency calculations

When DDR is in synchronous mode, the existing code assigns sysclk
frequency to DDR frequency.  It should be synchronous with the platform
frequency.  CPU frequency is based on platform frequency in synchronous
mode.

Also fix:

* Fixes the bit mask for DDR_SYNC (RCWSR5[184])
* Corrects the detection of synchronous mode.

Signed-off-by: Srikanth Srinivasan <[email protected]>
Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Ed Swarthout <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>

ppc/85xx: Fixup PCI nodes for P1_P2_RDB

While we had ft_pci_board_setup it wasn't being called by
ft_board_setup.  Fix that so we actually update the device tree PCI
nodes on P1_P2_RDB boards.

Signed-off-by: Kumar Gala <[email protected]>

nios2: add nios2-generic board

This is a generic approach to port u-boot for nios2 boards.
You may find the usage of this approach on the nioswiki,
http://nioswiki.com/DasUBoot

A fpga parameter file, which contains base address information
and drivers declaration, is generated from Altera's hardware system
description sopc file using tools.

The example fpga parameter file is compatible with EP1C20, EP1S10
and EP1S40 boards. So these boards can be removed after this commit.
Though epcs controller is removed to cut the dependency of altera_spi
driver.

Signed-off-by: Thomas Chou <[email protected]>
Signed-off-by: Scott McNutt <[email protected]>

nios2: fix no flash, add nand and mmc init in board.c

This patch fixes error when CONFIG_SYS_NO_FLASH. And adds
nand flash and mmc initialization, which should go before
env initialization.

Signed-off-by: Thomas Chou <[email protected]>
Signed-off-by: Scott McNutt <[email protected]>

nios2: consolidate reset initialization

Global interrupt should be disabled from the beginning.

Signed-off-by: Thomas Chou <[email protected]>
Signed-off-by: Scott McNutt <[email protected]>

altera_jtag_uart: bypass when no jtag connection

This patch adds an option to bypass output waiting when there
is no jtag connection. This allows the jtag uart work similar
to a serial uart, ie, boot even without connection.

This option is enabled with CONFIG_ALTERA_JTAG_UART_BYPASS

Signed-off-by: Thomas Chou <[email protected]>
Signed-off-by: Scott McNutt <[email protected]>

nios2: add dma_alloc_coherent

This function return cache-line aligned allocation which is mapped
to uncached io region.

Signed-off-by: Thomas Chou <[email protected]>
Signed-off-by: Scott McNutt <[email protected]>

nios2: add 64 bits swab support

This patch adds 64 bits swab support. Most 32 bits processors use
this. We need 64 bits swab for UBI.

Signed-off-by: Thomas Chou <[email protected]>
Signed-off-by: Scott McNutt <[email protected]>

nios2: add altera cf reset

This patch toggles power to reset the cf card.

Signed-off-by: Thomas Chou <[email protected]>
Signed-off-by: Scott McNutt <[email protected]>

nios2: allow link script overriding from boards

This patch allow boards to override the default link script.

Signed-off-by: Thomas Chou <[email protected]>
Signed-off-by: Scott McNutt <[email protected]>

mpc5121: pdm360ng: add coprocessor POST

Adds coprocessor communication POST code

Signed-off-by: Anatolij Gustschin <[email protected]>

mpc5121: add common post_word_load/store code

Add common post_word_load/post_word_store routines
for all mpc5121 boards. pdm360ng board POST support
added by subsequent patch needs them.

Signed-off-by: Anatolij Gustschin <[email protected]>

mpc5121: add support for PDM360NG board

PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.

Signed-off-by: Michael Weiss <[email protected]>
Signed-off-by: Detlev Zundel <[email protected]>
Signed-off-by: Anatolij Gustschin <[email protected]>

mpc5121: determine RAM size using get_ram_size()

Configure CONFIG_SYS_MAX_RAM_SIZE address range in
DDR Local Access Window and determine the RAM size.
Fix DDR LAW afterwards using detected RAM size.

Signed-off-by: Anatolij Gustschin <[email protected]>

mpc512x: make MEM IO Control configuration a board config option

Signed-off-by: Anatolij Gustschin <[email protected]>

mpc5121: add PSC serial communication routines

Signed-off-by: Anatolij Gustschin <[email protected]>

mpc512x: add multi serial PSC support

Extend mpc512x serial driver to support multiple PSC ports.

Subsequent patches for PDM360NG board support make use of this
functionality by defining CONFIG_SERIAL_MULTI in the board config
file. Additionally the used PSC devices are specified by defining
e.g. CONFIG_SYS_PSC1, CONFIG_SYS_PSC4 and CONFIG_SYS_PSC6.

Support for PSC devices other than 1, 3, 4 and 6 is not added
by this patch because these aren't used currently. In the future
it can be easily added using DECLARE_PSC_SERIAL_FUNCTIONS(N) and
INIT_PSC_SERIAL_STRUCTURE(N) macros in cpu/mpc512x/serial.c.
Additionally you have to add code for registering added
devices in serial_initialize() in common/serial.c.

Signed-off-by: Anatolij Gustschin <[email protected]>

serial: struct serial_device: add uninit() entry for drivers

Subsequent patch extends mpc512x serial driver to support
multiple PSC ports. The driver will provide an uninit()
function to stop the serial controller and to disable the
controller's clock. Adding uninit() entry to struct serial_device
allows disabling the serial controller after usage of
a stdio serial device.

This patch adds uninit() entry to the struct serial_device
and fixes initialization of this structure in the code
accordingly.

Signed-off-by: Anatolij Gustschin <[email protected]>

Merge branch 'master' of git://git.denx.de/u-boot-mmc

Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx

Merge branch 'master' of git://git.denx.de/u-boot-microblaze

Merge branch 'master' of git://git.denx.de/u-boot-i2c

ppc/85xx: PIO Support for FSL eSDHC Controller Driver

On some Freescale SoC Internal DMA of eSDHC controller has bug.
So PIO Mode has been introduced to do data transfer using CPU.

Signed-off-by: Dipen Dudhat <[email protected]>

mpc83xx: turn on icache in core initialization to improve u-boot boot time

before, MPC8349ITX boots u-boot in 4.3sec:

        column1 is elapsed time since first message
        column2 is elapsed time since previous message
        column3 is the message
0.000 0.000: U-Boot 2010.03-00126-gfd4e49c (Apr 11 2010 - 17:25:29) MPC83XX
0.000 0.000:
0.000 0.000: Reset Status:
0.000 0.000:
0.032 0.032: CPU:   e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
0.032 0.000: Board: Freescale MPC8349E-mITX
0.032 0.000: UPMA:  Configured for compact flash
0.032 0.000: I2C:   ready
0.061 0.028: DRAM:  256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
1.516 1.456: FLASH: 16 MB
2.641 1.125: PCI:   Bus Dev VenId DevId Class Int
2.652 0.011:         00  10  1095  3114  0180  00
2.652 0.000: PCI:   Bus Dev VenId DevId Class Int
2.652 0.000: In:    serial
2.652 0.000: Out:   serial
2.652 0.000: Err:   serial
2.682 0.030: Board revision: 1.0 (PCF8475A)
3.080 0.398: Net:   TSEC1: No support for PHY id ffffffff; assuming generic
3.080 0.000: TSEC0, TSEC1
4.300 1.219: IDE:   Bus 0: .** Timeout **

after, MPC8349ITX boots u-boot in 3.0sec:

0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX
0.010 0.000:
0.010 0.000: Reset Status:
0.010 0.000:
0.017 0.007: CPU:   e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
0.017 0.000: Board: Freescale MPC8349E-mITX
0.038 0.020: UPMA:  Configured for compact flash
0.038 0.000: I2C:   ready
0.038 0.000: DRAM:  256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
0.260 0.222: FLASH: 16 MB
1.390 1.130: PCI:   Bus Dev VenId DevId Class Int
1.390 0.000:         00  10  1095  3114  0180  00
1.390 0.000: PCI:   Bus Dev VenId DevId Class Int
1.400 0.010: In:    serial
1.400 0.000: Out:   serial
1.400 0.000: Err:   serial
1.400 0.000: Board revision: 1.0 (PCF8475A)
1.832 0.432: Net:   TSEC1: No support for PHY id ffffffff; assuming generic
1.832 0.000: TSEC0, TSEC1
3.038 1.205: IDE:   Bus 0: .** Timeout **

also tested on these boards (albeit with a less accurate
boottime measurement method):

seconds: before  after
8349MDS  ~2.6    ~2.2
8360MDS  ~2.8    ~2.6
8313RDB  ~2.5    ~2.3 #nand boot
837xRDB  ~3.1    ~2.3

also tested on an 8323ERDB.

v2: also remove the delayed icache enablement assumption in arch ppc's
board.c, and add a CONFIG_MPC83xx define in the ITX config file for
consistency (even though it was already being defined in 83xx'
config.mk).

Signed-off-by: Kim Phillips <[email protected]>

mpc83xx: enable command line autocompletion

because it's convenient.

Signed-off-by: Kim Phillips <[email protected]>

mpc83xx: use "A" nomenclature only on mpc834x and mpc836x families

marketing didn't extend their postpend-with-an-A naming strategy
on rev.2's and higher beyond the first two 83xx families.  This
patch stops us from misreporting we're running e.g., on an MPC8313EA,
when such a name doesn't exist.

Signed-off-by: Kim Phillips <[email protected]>

mpc83xx: Use CONFIG_FSL_ESDHC to enable sdhc clk

Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define
instead of a platform define. This will enable all the 83xx
platforms to use sdhc_clk based on CONFIG_FSL_ESDHC.  It's
the same patch as commit 6b9ea08c5010eab5ad1056bc9bf033afb672d9cc
for the ppc/85xx.

Signed-off-by: Rini <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>

Move arch/ppc to arch/powerpc

As discussed on the list, move "arch/ppc" to "arch/powerpc" to
better match the Linux directory structure.

Please note that this patch also changes the "ppc" target in
MAKEALL to "powerpc" to match this new infrastructure. But "ppc"
is kept as an alias for now, to not break compatibility with
scripts using this name.

Signed-off-by: Stefan Roese <[email protected]>
Acked-by: Wolfgang Denk <[email protected]>
Acked-by: Detlev Zundel <[email protected]>
Acked-by: Kim Phillips <[email protected]>
Cc: Peter Tyser <[email protected]>
Cc: Anatolij Gustschin <[email protected]>

ppc4xx: TLB init file cleanup

This patch adds new macros, with frequently used combinations of the
4xx TLB access control and storage attibutes. Additionally the 4xx init.S
files are updated to make use of these new macros. Resulting in easier
to read TLB definitions.

Additionally some init.S files are updated to use the mmu header for the
TLB defines, instead of defining their own macros.

Signed-off-by: Stefan Roese <[email protected]>

fsl_i2c: Added a callpoint for i2c_board_late_init

This patch adds a callpoint in i2c_init that allows board specific
i2c board initialization (typically for i2c bus reset) that is called
after i2c_init operations, allowing the i2c_board_late_init function
to use the pre-configured i2c bus speed and slave address.

nios2: Move individual board linker scripts to common script in cpu tree.

Signed-off-by: Scott McNutt <[email protected]>

microblaze: Consolidate cache code

Merge cpu and lib cache code.
Flush cache before disabling.

Signed-off-by: Michal Simek <[email protected]>

microblaze: Flush cache before jumping to kernel

There is used max cache size on system which doesn't define
cache size.

Signed-off-by: Michal Simek <[email protected]>

microblaze: Support system with WB cache

WB cache use different instruction that WT cache but the major code
is that same. That means that wdc.flush on system with WT cache
do the same thing as before.

You need newer toolchain with wdc.flush support.

Signed-off-by: Michal Simek <[email protected]>

microblaze: Change initialization sequence

env_relocation should be called first.
Added stdio_init too.

Signed-off-by: Michal Simek <[email protected]>

microblaze: Change cache report messages

It is more accurate to show that caches are OFF instead of FAIL.

Signed-off-by: Michal Simek <[email protected]>

microblaze: Fix interrupt handler code

It is better to read ivr and react on it than do long parsing from
two regs. Interrupt controller returs actual irq number.

Signed-off-by: Michal Simek <[email protected]>

microblaze: Move FSL initialization to board.c

Move FSL out of interrupt controller.

Signed-off-by: Michal Simek <[email protected]>

microblaze: Move timer initialization to board.c

I would like to handle case where system doesn't contain
intc that's why I need timer initialization out of intc code.

Signed-off-by: Michal Simek <[email protected]>

microblaze: Fix irq.S code

It is ancient code. There is possible to save several instructions
just if we use offset instead of addik

Signed-off-by: Michal Simek <[email protected]>

microblaze: Add FDT support

This patch adds FDT (flattened device tree) support to microblaze arch.

Tested with Linux arch/microblaze kernels with and without compiled in
FDT on Xilinx ML506 board.

Signed-off-by: Arun Bhanu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>

ppc4xx: Add option for PPC440SPe ports without old Rev. A support

The 440SPe Rev. A is quite old and newer 440SPe boards don't need support
for this CPU revision. Since removing support for this older version
simplifies the creation for newer U-Boot ports, this patch now enables
440SPe > Rev. A support by creating the CONFIG_440SPE_REVA define. By
defining this in the board config header, Rev. A will still be supported.
Otherwise (default for newer board ports), Rev. A will not be supported.

Signed-off-by: Stefan Roese <[email protected]>

ppc4xx: alpr: Remove some not needed commands to make image fit again

The latest changes increased the size of the alpr image a bit more.
Now it doesn't fit into the 256k reserved for it. This patch now removes
the commands "loads" and "loadb" which are not needed in the production
systems.

Signed-off-by: Stefan Roese <[email protected]>
Cc: Pieter Voorthuijsen <[email protected]>

Update README to reflect new directory structure

Also fix up some whitespace issues that were introduced when moving
directory locations.

Signed-off-by: Peter Tyser <[email protected]>

nios2: Move cpu/nios2/* to arch/nios2/cpu/*

Signed-off-by: Peter Tyser <[email protected]>

nios: Move cpu/nios/* to arch/nios/cpu/*

Signed-off-by: Peter Tyser <[email protected]>

sparc: Move cpu/leon[23] to arch/sparc/cpu/leon[23]

Signed-off-by: Peter Tyser <[email protected]>

i386: Move cpu/i386/* to arch/i386/cpu/*

Signed-off-by: Peter Tyser <[email protected]>

microblaze: Move cpu/microblaze/* to arch/microblaze/cpu/*

Signed-off-by: Peter Tyser <[email protected]>

avr32: Move cpu/at32ap/* to arch/avr32/cpu/*

Signed-off-by: Peter Tyser <[email protected]>

mips: Move cpu/mips/* to arch/mips/cpu/*

Signed-off-by: Peter Tyser <[email protected]>

blackfin: Move cpu/blackfin/* to arch/blackfin/cpu/*

Signed-off-by: Peter Tyser <[email protected]>

m68k: Move cpu/$CPU to arch/m68k/cpu/$CPU

Signed-off-by: Peter Tyser <[email protected]>

arm: Move cpu/$CPU to arch/arm/cpu/$CPU

Signed-off-by: Peter Tyser <[email protected]>

sh: Move cpu/$CPU to arch/sh/cpu/$CPU

Signed-off-by: Peter Tyser <[email protected]>

ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU

Signed-off-by: Peter Tyser <[email protected]>

Move architecture-specific includes to arch/$ARCH/include/asm

This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.

Signed-off-by: Peter Tyser <[email protected]>

Replace "#include <asm-$ARCH/$FILE>" with "#include <asm/$FILE>"

The appropriate include/asm-$ARCH directory should already by symlinked
to include/asm so using the whole "asm-$ARCH" path is unnecessary.

This change should also allow us to move the include/asm-$ARCH
directories into their appropriate lib/$ARCH/ directories.

Signed-off-by: Peter Tyser <[email protected]>